receiver.asm100664 423 0 15422 6245066014 12014 0ustar luigiwheel; ; File: receiver.asm -- receiver module for cable tester ; ; (C) 1996 Maurizio Fabbri, Fabio Raso, Luigi Rizzo ; Dipartimento di Ingegneria dell'Informazione ; via Diotisalvi 2 -- 56126 PISA (ITALY) ; email: luigi@iet.unipi.it ; device pic16c84 config CP=off,WDT=off,PWRT=off,OSC=hs nuovo equ 1 include "defs.inc" ; on_1 targer, on_0 target sample the input line and jump to target ; if the desired value is found. Make the program easier to read. on_1 macro ; on_1 target movf PORTB, W ; W <- sample portb andwf maskB, W ; W <- mask & W, set Z flag btfss STATUS, Zbit goto \1 endm on_0 macro ; on_1 target movf PORTB, W ; W <- sample portb andwf maskB, W ; W <- mask & W, set Z flag btfsc STATUS, Zbit goto \1 endm ;--- specific registers ctr1 equ 0x10 ; two generic counters ctr2 equ 0x11 broken equ 0x14 ; 1 for each broken line bitptr equ 0x15 ; bit under test (0..7) maskB equ 0x16 ; corresponding mask digits equ 0x17 ; what goes in digits ? (2 4-bit nibbles) BufP0 equ 0x20 ; what is received on this bit ? [ 8 bytes ] ; -- up to BufP7 equ 0x27 org 0 goto start ; start a new test ; total delay (incl. call+ret) 4*W + 3 wdelay ; a simple delay routine using W addlw -1 ; 4 ck/loop + 5 last one (incl.ret) btfss STATUS,Zbit ; salta se Zbit = 1 goto wdelay return ;--- bit2display 0..9 -> 0..9 bin2display ; up to 16 codes andlw 0xf ; mask addwf PCL,F ; -gfedcba ; segments retlw B'00111111' ; digit 0 (unused) retlw B'00000110' ; digit 1 retlw B'01011011' ; digit 2 retlw B'01001111' ; digit 3 retlw B'01100110' ; digit 4 retlw B'01101101' ; digit 5 retlw B'01111101' ; digit 6 retlw B'00000111' ; digit 7 retlw B'01111111' ; digit 8 retlw B'01101111' ; digit 9 stuck1 equ 0x0a retlw B'00000001' ; stuck 1 unconn equ 0x0b retlw B'01000000' ; unconnected - stuck0 equ 0x0c retlw B'00001000' ; stuck 0 retlw B'00001001' ; retlw B'01001000' ; retlw B'01001001' ; ;--- a quick test to see if everything ok (BufP[i] = i) ; returns Z set if everything is OK tutto_ok bsf STATUS,Cbit movf broken,0 ; test broken andlw 0xFF btfss STATUS,Zbit return ; with Z clear. ctrlincrociati ; scan for BufP[i] = i return ; with Z clear if false return ; with Z set if true display ldc 0xff, ctr1 ; number of cycles ? refreshDisplay movf digits,W call bin2display bcf PORTA,DISPLAY2 movwf PORTB bsf PORTA,DISPLAY1 movlw 0xff call wdelay swapf digits,W call bin2display bcf PORTA,DISPLAY1 movwf PORTB bsf PORTA,DISPLAY2 movlw 0xff ; attesa display2 --> display1 ... call wdelay ; ... circa 60 micro sec. loop ctr1, refreshDisplay return ;--- ; test_line tests a specific line, with mask in maskB ; bitptr also contains the index ; ; uses ctr2, ctr1 as loop counters test_line ; Each bit is sent every 28 cycles, each line carries 8 bits ; followed by about 56 bits of silence (for a cycle time of ; 64 bits). To avoid false detections, we should do as follows: ; 1) wait at most 10 bit times for the line to become '1' ; 2) wait for at least 40 bits of '1' or go to step 1 ; if the above does not complete in more than 6 phases at 1, ; give up and mark the line as broken. ldc 0x0a, ctr2 ; how many times wait for '1' period ? max 10 goto w_hi w_l_again loop ctr2, w_hi movf maskB,0 ; too many retries, abort iorwf broken, 1 ; mark as broken retlw unconn ; wait at most 10 bit times for the line to become '1' ; w_hi_l takes 7 cycles, so 0x30 is more than safe w_hi ldc 0x30, ctr1 w_hi_l on_1 w_l_2 loop ctr1, w_hi_l ; wait again... movf maskB, W ; 1 not found, mark as stuck 0 and return. iorwf broken, F ; mark as broken retlw stuck0 ; wait for bit to stay up for a sufficient time, >= 48 bits. ; the loop w_l_3 is 7 clocks, so ctr1 about (48*28/7) = 192 ; or less if ever. w_l_2 ldc 0xc0, ctr1 w_l_3 on_0 w_l_again loop ctr1, w_l_3 ; ok, '1' for a sufficient time, now wait for 0 again. ; Cannot fail here, but wait at most 20 bit times. This time ; the cycle is 6 clocks, hence ctr1 = (20*28/6) = 93. The error ; on the start bit is at most 6 clocks, i.e. 1/4 bit time. ; From there on, we can simply accumulate bits. ldc 0x5d, ctr1 movf maskB,W ; W <- mask w_l_4 andwf PORTB,W ; W <- portb & mask, set Z btfsc STATUS, Zbit ; Z set if bit = 0 (found) goto start_found loop ctr1, w_l_4 movf maskB,W iorwf broken,1 ; '0' not found. Mark as broken and stuck to 1 retlw stuck1 start_found: ; here we are 4..10 cycles into the start bit. ; wait an additional 7 cycles, then sample every 28 ldc 7, ctr2 ; mask for out data, now ctr2 is a bit counter, clrf ctr1 ; and ctr1 an accumulator movlw 0x6 call wdelay ; 27 cycles get_bit nop nop nop bcf STATUS, Cbit ; clear carry movf maskB,W ; load mask in W. andwf PORTB,W ; sample portb, mask & set Z btfss STATUS, Zbit ; Z set if bit = 0 bsf STATUS, Cbit ; was 1, set carry rlf ctr1, F ; accumulate movlw 0x3 call wdelay ; 15 clocks loop ctr2, get_bit incf ctr1, 0 ; now ctr1 contains the code, inc & store in W andlw 0xf return ;---- main program ---- ; ; Input lines are assumed to be connected to the sender, where ; they are all but one hold to '1'. On the remaining line, ; a code is cyclically transmitted indicating which line is ; this at the remote end. start clrf bitptr ; same (index) ldc 1, maskB ; line currently under test. clrf broken ; bitmap of broken lines bsf STATUS,RP0bit ; page 1 bcf OPTION_REG, 7 ; pull up enabled ldc 1, TRISA ; set RA0 as input, rest output ldc 0xff, TRISB ; port B input bcf STATUS,RP0bit ; page 0 clrf PORTA ; display off wire call test_line ; test input lines, one at a time. result in W movwf digits ; used as a temp. buffer movf bitptr,W ; W <- &BufP[ bitptr ] addlw BufP0 ; store result movwf FSR movf digits,W ; W <- digits movwf INDIR incf bitptr, 1 ; this also clears carry, which must be 0 rlf maskB,1 ; move to next bit btfss STATUS,Cbit ; if carry set, we are done goto wire ;--- when the test is over, show the results. --- show btfsc PORTA,TastoV ; first, wait for a keypress. goto show bsf STATUS,RP0bit ; page 1 clrf TRISB ; portb = out bcf STATUS,RP0bit ; page 0 ; call tutto_ok ; quick check if all ok (Z set if true) ; btfss STATUS,Zbit goto nook infinitoSi ; all ok. Display "SI" forever ldc 0x51, digits ; SI call display goto infinitoSi nook clrf bitptr ; T_OK nook_lp movf bitptr,0 ; read a digit addlw BufP0 movwf FSR movf INDIR,0 ; read BufP[i] andlw 0xf ; mask movwf digits swapf bitptr,W addlw 0x10 andlw 0xf0 iorwf digits,F ; store call display incf bitptr,1 movf bitptr,0 xorlw 0x8 btfss STATUS, Zbit goto nook_lp goto nook end defs.inc100664 423 0 2166 6244736146 11114 0ustar luigiwheel; constants W equ 0 F equ 1 ldc macro ; ldc constant, file -- load a constant into a reg. movlw \1 movwf \2 endm loop macro ; loop file, target decfsz \1, F goto \2 endm ; master Nbit equ 0x08 ; Total bits per frame Npin equ 0x08 ; numero di piedini tramaX equ B'01110000' ; basic frame ; slave ; ; TastoV equ 0x0 DISPLAY1 equ 0x1 DISPLAY2 equ 0x2 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;; Pagina 00 INDIR equ 0x00 FSR equ 0x04 PCL equ 0x02 PORTB equ 0x06 PORTA equ 0x05 RP0bit equ 0x05 RTIFbit equ 0x02 Cbit equ 0x00 Zbit equ 0x02 INTCON equ 0x0B STATUS equ 0x03 RTCC equ 0x01 ;;;;; Master tramaShift equ 0x10 tramaReale equ 0x11 CCripbit equ 0x12 CCbit equ 0x13 ClrBPin equ 0x14 ; Indica il BIT ZERO sul piedino i-esimo SetBPin equ 0x15 ; Indica il BIT UNO sul piedino i-esimo ;;;;; Slave ;--- page 1 registers -- set STATUS, RP0 TRISA equ 0x05 TRISB equ 0x06 OPTION_REG equ 0x01 sender1.asm100664 423 0 4077 6245065626 11545 0ustar luigiwheel; ; File: sender1.asm, sender module for cable tester ; ; (C) 1996 Maurizio Fabbri, Fabio Raso, Luigi Rizzo ; Dipartimento di Ingegneria dell'Informazione ; via Diotisalvi 2 -- 56126 PISA (ITALY) ; email: luigi@iet.unipi.it ; ; keep all pins but one to '1', on the remaining one sent a code. ; ; note: the weak pullups are too weak to make the line change state ; in time. Perhaps it is necessary to add a stronger pullup (e.g. 1K) ; to force a '1'. This is better than having the PIC drive the line, ; because it allows short circuits to be detected. device pic16c84 config CP=off,WDT=off,PWRT=off,OSC=hs include "defs.inc" ; variables dataout equ 0x10 ; the byte which goes out bitctr equ 0x11 ; how many bits in current byte ? maskB equ 0x12 ; bit enabled in port B ctr1 equ 0x13 ; delay org 0 start clrf INTCON ; disable interrupts bsf STATUS,RP0bit ; page 1 bcf OPTION_REG,7 ; pullup enabled. ldc 0xff, TRISB ; all bits input bcf STATUS,RP0bit ; page 0 ldc 0xff, PORTB ; all outputs = 1 (default) main_loop ldc 1, maskB ; start from pin 1 ldc 0x70, dataout ; flag pin_loop ldc 8, bitctr movf maskB, W bsf STATUS,RP0bit ; page 1 xorwf TRISB, F ; make this bit an output bcf STATUS,RP0bit ; page 0 bit_loop ; ---------------------- movlw 0 ; default out value btfsc dataout,7 ; test msb movlw 0xff ; this if bit is 1 movwf PORTB ; output data bcf STATUS, Cbit ; clear carry, a 0 comes in rlf dataout, F btfsc STATUS, Cbit ; store carry into bit 0 incf dataout, F nop movlw 0x5 movwf ctr1 ; 11 clocks until now l0 loop ctr1, l0 ; N*3 - 1 clocks loop bitctr, bit_loop ; 3 clocks ; 28 clocks/bit, 27 on last bit nop nop nop movlw 0xff movwf PORTB ; restore idle level movf maskB, W bsf STATUS,RP0bit ; page 1 xorwf TRISB, F ; make this bit an input again bcf STATUS,RP0bit ; page 0 incf dataout,F bcf STATUS, Cbit ; clear carry rlf maskB, F btfss STATUS, Cbit goto pin_loop goto main_loop end README100664 423 0 5723 6245066046 10356 0ustar luigiwheelThis is the code for a simple cable tester for multipolar cables where the two ends are not in physical proximity; examples include network/phone cables etc. The tester is made of two modules: a sender, and a receiver, both based on a PIC. (C) 1996 Maurizio Fabbri, Fabio Raso, Luigi Rizzo Dipartimento di Ingegneria dell'Informazione via Diotisalvi 2 -- 56126 PISA (ITALY) email: luigi@iet.unipi.it PRINCIPLE OF OPERATION The tester uses N>=2 wires. In turn, each of the wires is used by the sender as a hot (H) wire, while the others are used as return wires. The sender module sweeps cyclically all the wires by sending a different code on each of them (a code is a bit pattern representing the wire index). The resulting pattern on each wire is made of a period of inactivity followed by the transmission of the code. The receiver scans all the wires, waiting for the idle period, and then trying to identify the code. Once all wires are processed, the output can be produced by displaying the connection between wires at the two ends. MORE DETAILS The current version of the tester uses just a PIC on each module, thus limiting to 8 wires. In order for the tester to work, it is necessary that at least two wires are connected in the cable (otherwise, the tester reports wires as disconnected). On the sender, wires are directly connected to the PIC's port B pins. The hot wire is configured as an output, whereas the return wires are configured as inputs and pulled up with an external resistor (about 1KOhm). On the receiver, wires go to port B pins through a current-limiting resistor (5 KOhm). This is to protect inputs and to avoid conflicts when portB is used to display results. The output is reported as a sequence of 2 digits: the first one reports the wire on the receiver, the second one the wire on the sender. For the latter, three special symbols are used to signal that the wire is stuck low, stuck high (or unconnected) or noisy. The testing process is quite fast (and could become faster). Each code is sent as an 8-bit pattern lasting 224us (28us/bit), so a full sweep takes 1.8ms. The receiver needs 1 sweep/wire to make a complete test, so test results are available in about 15ms. SCHEMATICS schematics are in the "tester.gif" file TODO + if wires are connected together, report all the wires in addition to the first one (requires a simple extension to the software - operating time remains the same). + if wires are connected to the receiver side only, report them as connected together (requires a simple extension to the software - operating time increases by a very little amount). + extend the tester to more than 8 wires (requires using external analog multiplexers, e.g. CD4051 1-to-8). The operating time is proportional to N*N, in the case of 64 wires it is still about 0.5s + make the tester report results over an RS232 line. A tester for 64 requires 1 PIC, eight 8-to-1 mux on each sender/receiver, plus 4 displays on the receiver. Makefile100664 423 0 635 6245064735 11116 0ustar luigiwheelASFLAGS=-l AS=picasm $(ASFLAGS) SRCS= receiver.asm defs.inc sender1.asm TARGETS= receiver.hex sender1.hex DOCS= README Makefile tester.fig tester.gif ALLSRCS= $(SRCS) $(DOCS) all: $(TARGETS) receiver.hex: receiver.asm defs.inc $(AS) receiver.asm sender1.hex: sender1.asm defs.inc $(AS) sender1.asm clean: - rm *.obj *.lst *.hex tester.tgz: $(ALLSRCS) $(TARGETS) tar cvzf tester.tgz $(ALLSRCS) $(TARGETS) tester.fig100664 423 0 41026 6245064712 11505 0ustar luigiwheel#FIG 3.1 Portrait Center Inches 1200 2 6 1050 1950 6450 5325 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 1950 3750 50 50 1950 3750 2000 3800 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 2250 4050 50 50 2250 4050 2300 4100 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 2550 4350 50 50 2550 4350 2600 4400 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 2850 4650 50 50 2850 4650 2900 4700 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 2850 5100 50 50 2850 5100 2900 5150 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 2550 5100 50 50 2550 5100 2600 5150 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 2250 5100 50 50 2250 5100 2300 5150 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 1950 5100 50 50 1950 5100 2000 5150 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 4650 5100 50 50 4650 5100 4700 5150 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 4950 5100 50 50 4950 5100 5000 5150 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 5250 5100 50 50 5250 5100 5300 5150 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 5550 5100 50 50 5550 5100 5600 5150 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 4650 4650 50 50 4650 4650 4700 4700 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 5550 3750 50 50 5550 3750 5600 3800 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 5250 4050 50 50 5250 4050 5300 4100 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 4950 4350 50 50 4950 4350 5000 4400 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 1200 4050 50 50 1200 4050 1250 4100 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 1200 4350 50 50 1200 4350 1250 4400 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 1200 3750 50 50 1200 3750 1250 3800 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 6300 3750 50 50 6300 3750 6350 3800 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 6300 4050 50 50 6300 4050 6350 4100 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 6300 4350 50 50 6300 4350 6350 4400 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 6300 3450 50 50 6300 3450 6350 3500 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 5250 3150 50 50 5250 3150 5300 3200 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 5250 2400 50 50 5250 2400 5300 2450 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 5850 2400 50 50 5850 2400 5900 2450 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 2400 3450 50 50 2400 3450 2450 3500 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 2400 3150 50 50 2400 3150 2450 3200 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 2625 3150 50 50 2625 3150 2675 3200 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 1200 2850 50 50 1200 2850 1250 2900 2 1 0 2 -1 7 0 0 -1 0.000 0 0 7 0 0 2 1800 4650 3000 4650 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 3000 4350 1800 4350 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 3000 4050 1800 4050 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 3000 3750 1800 3750 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 2850 4650 2850 5100 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 2550 4350 2550 5100 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 2250 4050 2250 5100 2 2 0 4 -1 7 0 0 -1 0.000 0 0 -1 0 0 5 1800 4575 1350 4575 1350 4725 1800 4725 1800 4575 2 2 0 4 -1 7 0 0 -1 0.000 0 0 -1 0 0 5 1800 4275 1350 4275 1350 4425 1800 4425 1800 4275 2 2 0 4 -1 7 0 0 -1 0.000 0 0 -1 0 0 5 1800 3975 1350 3975 1350 4125 1800 4125 1800 3975 2 2 0 4 -1 7 0 0 -1 0.000 0 0 -1 0 0 5 1800 3675 1350 3675 1350 3825 1800 3825 1800 3675 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 1950 3750 1950 5100 2 2 0 4 -1 7 0 0 -1 0.000 0 0 -1 0 0 5 6150 4575 5700 4575 5700 4725 6150 4725 6150 4575 2 2 0 4 -1 7 0 0 -1 0.000 0 0 -1 0 0 5 6150 4275 5700 4275 5700 4425 6150 4425 6150 4275 2 2 0 4 -1 7 0 0 -1 0.000 0 0 -1 0 0 5 6150 3975 5700 3975 5700 4125 6150 4125 6150 3975 2 2 0 4 -1 7 0 0 -1 0.000 0 0 -1 0 0 5 6150 3675 5700 3675 5700 3825 6150 3825 6150 3675 2 1 0 2 -1 7 0 0 -1 0.000 0 0 7 0 0 2 4500 4650 5700 4650 2 1 0 2 -1 7 0 0 -1 0.000 0 0 7 0 0 2 4500 4350 5700 4350 2 1 0 2 -1 7 0 0 -1 0.000 0 0 7 0 0 2 4500 4050 5700 4050 2 1 0 2 -1 7 0 0 -1 0.000 0 0 7 0 0 2 4500 3750 5700 3750 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 1 0 3 2 1 2.00 120.00 240.00 1350 4650 1200 4650 1200 2100 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 1 0 3 2 1 2.00 120.00 240.00 6150 4650 6300 4650 6300 2700 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 1350 3750 1200 3750 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 1350 4050 1200 4050 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 1350 4350 1200 4350 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 6150 4350 6300 4350 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 6150 4050 6300 4050 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 6150 3750 6300 3750 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 4650 4650 4650 5100 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 4950 4350 4950 5100 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 5250 4050 5250 5100 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 5550 3750 5550 5100 2 2 0 4 -1 7 0 0 -1 0.000 0 0 7 0 0 5 3000 2100 4500 2100 4500 4800 3000 4800 3000 2100 2 1 0 4 -1 7 0 0 -1 0.000 0 0 -1 0 0 4 3600 2100 3600 2250 3900 2250 3900 2100 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 4500 3450 6300 3450 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 3 4500 3150 5250 3150 5250 2925 2 1 0 4 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 5025 2925 5475 2925 2 2 0 4 -1 7 0 0 -1 0.000 0 0 -1 0 0 5 5175 2700 5325 2700 5325 2850 5175 2850 5175 2700 2 1 0 4 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 5025 2625 5475 2625 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 5 4500 2850 4800 2850 4800 2400 5250 2400 5250 2625 2 1 0 4 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 5550 2250 5550 2550 2 1 0 4 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 5700 2250 5700 2550 2 1 0 4 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 5550 3000 5550 3300 2 1 0 4 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 5700 3000 5700 3300 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 5250 3150 5550 3150 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 5250 2400 5550 2400 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 3 5700 2400 5850 2400 5850 3150 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 5700 3150 5850 3150 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 5850 2400 6000 2400 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 6000 2250 6000 2550 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 6000 2250 6150 2325 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 6000 2325 6150 2400 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 6000 2400 6150 2475 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 6000 2475 6150 2550 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 3000 3450 2400 3450 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 3000 3150 2400 3150 2 1 0 4 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 2250 3150 2250 3450 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 2700 3450 2700 3525 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 2550 3525 2850 3525 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 2550 3675 2625 3525 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 2625 3675 2700 3525 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 2700 3675 2775 3525 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 2775 3675 2850 3525 2 2 0 4 -1 7 0 0 -1 0.000 0 0 -1 0 0 5 1800 2775 1350 2775 1350 2925 1800 2925 1800 2775 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 1200 2850 1350 2850 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 3 1800 2850 2625 2850 2625 3150 2 2 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 5 1800 4950 5700 4950 5700 5250 1800 5250 1800 4950 4 0 -1 0 0 0 12 0.0000 4 135 315 1425 2700 50K\001 4 0 -1 0 0 0 12 0.0000 4 135 225 1425 3600 1K\001 4 0 -1 0 0 0 12 0.0000 4 180 375 5550 2100 20pF\001 4 0 -1 0 0 0 12 0.0000 4 135 480 4950 2250 4MHz\001 4 0 -1 0 0 0 12 0.0000 4 180 915 1350 2175 Vcc (3..6V)\001 4 0 -1 0 0 0 12 0.0000 4 135 225 5775 3600 1K\001 4 0 -1 0 0 0 12 0.0000 4 135 1275 3225 5175 Wires under test\001 -6 6 1725 9825 5775 10275 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 2850 10050 50 50 2850 10050 2900 10100 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 2550 10050 50 50 2550 10050 2600 10100 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 2250 10050 50 50 2250 10050 2300 10100 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 1950 10050 50 50 1950 10050 2000 10100 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 4650 10050 50 50 4650 10050 4700 10100 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 4950 10050 50 50 4950 10050 5000 10100 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 5250 10050 50 50 5250 10050 5300 10100 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 5550 10050 50 50 5550 10050 5600 10100 2 2 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 5 1800 9900 5700 9900 5700 10200 1800 10200 1800 9900 4 0 -1 0 0 0 12 0.0000 4 135 1275 3225 10125 Wires under test\001 -6 6 1800 6225 2325 6675 2 1 0 4 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 2100 6300 2100 6600 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 1 0 2 2 1 2.00 60.00 60.00 2100 6525 1875 6600 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 2100 6375 1875 6300 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 2100 6450 2250 6450 -6 6 1800 5775 2325 6225 2 1 0 4 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 2100 5850 2100 6150 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 1 0 2 2 1 2.00 60.00 60.00 2100 6075 1875 6150 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 2100 5925 1875 5850 2 1 0 2 -1 7 0 0 -1 0.000 0 0 -1 0 0 2 2100 6000 2250 6000 -6 6 2100 7575 2550 7950 1 3 0 2 -1 0 0 0 20 0.000 1 0.0000 2325 7650 50 50 2325 7650 2375 7700 2 1 0 2 -1 7 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